1. Field of the Invention
The present invention generally relates to an apparatus and a method for cleaning the surface of a substrate. More specifically, the present invention provides an apparatus and a method for cleaning the surface of a dielectric film.
2. Description of the Related Art
Interconnect structures of integrated circuits and semiconductor devices are typically fabricated by forming a series of dielectric layers and conductive layers in order to create a three dimensional network of conductive layers separated by dielectric material. The interconnect structure may be fabricated using, for example, a damascene structure in which a dielectric layer such as a low k dielectric layer is formed atop one or more conductive plugs or sub-layers. In order to form an electrical connection to the conductive sub-layers, the dielectric is patterned and etched to define via openings therethrough. Formation of the openings within the dielectric layer exposes a portion of the conductive line. Therefore, reliable formation of these interconnect features is an important factor in ensuring the quality, performance and reliability of devices formed on individual substrates and in each die.
The market for integrated circuits and semiconductor devices continually requires faster circuitry and greater circuit density, e.g., including millions of components on a single chip. As a result, the dimensions of the integrated circuit components shrink, and the choice of materials used to fabricate such components becomes increasingly important. For example, low resistivity metal interconnects, such as copper and aluminum, that provide conductive paths between the components on the integrated circuits, now require low dielectric constant layers, e.g., having a dielectric constant ≦4, between the metal interconnects to provide insulating inter-metal layers that reduce capacitive coupling between adjacent metal lines, thereby enabling reliable performance at the same line widths.
Low k materials conventionally used as dielectric layers include un-doped silicon glass (USG), fluorine-doped silicon glass (FSG), carbon doped silicon dioxide, and polytetrafluoroethylene, among other materials, deposited as a film on a substrate. Before forming the conductive layer on the etching-defined dielectric layer, it is desirable to clean the top surface of the dielectric film to remove residual contaminants, such as native oxides and/or organic materials from etching and/or ashing processes. Removing contaminants reduces contact resistance and/or prevents adhesion loss at the interface of the conductive layer to be deposited.
A precleaning procedure may be used to remove contaminants from the dielectric film surface prior to deposition of the conductive layer. However, conventional in-situ plasma used for precleaning the dielectric layer may damage or resputter the dielectric film surface or generate unwanted charged particles in the process chamber prior to the subsequent conductive layer deposition. As such, low k dielectric film cleaned by using in-situ plasma techniques may result in film degradation and defects. Additionally, carbon doped low k materials tend to experience carbon depletion or “k loss,” in which the dielectric constant of the low k material is increased after exposure to the plasma used in the cleaning procedure. As a result, undesired cross-talk and RC delay become more problematic after the cleaning procedure.
Therefore, there is a need in the art for an improved low k dielectric cleaning process.